chxp, like chip

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Implemented fixed-pt arithmetic units in Verilog using Xilinx Vivado and deployed to a Nexys A7-100T FPGA, verified against Matlab reference outputs (TODO)
Sliding-window moving average in Verilog and deployed to a Nexys A7-100T FPGA with an open-source flow using Nix, and verified against Matlab reference outputs
Physical Design of a 2-Bit full adder using TSMC 0.4µm (TODO)